• Achieve predictable single-pass power savings with production-proven RTL power analysis
• Maximize power savings with comprehensive clock, memory and datapath power reduction techniques
• Control automatic power-efficient RTL generation for power trade-offs vs. other application-specific design constraints
• Guide synthesis clock gating for higher power savings and better skew control
• Debug power rapidly with a powerful yet intuitive graphical cockpit and user-programmable interface
• Run in minutes on a million gate-equivalent RTL with full-chip capacity
  

PowerArtist-XP employs a systemic approach to power reduction by delivering a complete RTL Design For Power methodology. It addresses the requirements of both the power-savvy RTL designer as well as the beginner by integrating analysis-driven automatic reduction in a powerful yet intuitive graphical cockpit. With PowerArtist-XP, designers can:

• Understand the power profile of their designs in terms of hotspots, power bugs, power-inefficient modules and architectures
• Identify and visualize highest impact power reduction opportunities across the design, module and sub-module levels
• Control the automatic RTL rewrite to achieve maximum power savings with minimum RTL edits and minimum design impact
• Monitor power efficiency via regressions throughout the design flow